?2007 fairchild semiconductor corporation 1 www.fairchildsemi.com fdp20n50 / FDPF20N50 rev. c fdp20n50 / FDPF20N50 500v n-channel mosfet april 2007 unifet tm fdp20n50 / FDPF20N50 500v n-channel mosfet features ? 20a, 500v, r ds(on) = 0.23 @v gs = 10 v ? low gate charge ( typical 45.6 nc) ?low c rss ( typical 27 pf) ?fast switching ? 100% avalanche tested ? improved dv/dt capability description these n-channel enhancement mode power field effect transistors are produced using fairchild?s proprietary, planar stripe, dmos technology. this advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. these devices are well suited for high efficient switched mode power supplies and active power factor correction. absolute maximum ratings thermal characteristics to-220 fdp series g s d to-220f fdpf series g s d d g s symbol parameter fdp20n50 FDPF20N50 unit v dss drain-source voltage 500 v i d drain current - continuous (t c = 25 c) - continuous (t c = 100 c) 20 12.9 20 * 12.9 * a a i dm drain current - pulsed (note 1) 80 80 * a v gss gate-source voltage 30 v e as single pulsed avalanche energy (note 2) 1110 mj i ar avalanche current (note 1) 20 a e ar repetitive avalanche energy (note 1) 25 mj dv/dt peak diode recovery dv/dt (note 3) 4.5 v/ns p d power dissipation (t c = 25 c) - derate above 25 c 250 2.0 38.5 0.3 w w/ c t j, t stg operating and storage temperature range -55 to +150 c t l maximum lead temperature for soldering purpose, 1/8? from case for 5 seconds 300 c symbol parameter fdp20n50 FDPF20N50 unit r jc thermal resistance, junction-to-case 0.5 3.3 c/w r cs thermal resistance, case-to-sink typ. 0.5 -- c/w r ja thermal resistance, junction-to-ambient 62.5 62.5 c/w * drain current limited by maximum junction temperature
2 www.fairchildsemi.com fdp20n50 / FDPF20N50 rev. c fdp20n50 / FDPF20N50 500v n-channel mosfet package marking and ordering information electrical characteristics t c = 25c unless otherwise noted notes: 1. repetitive rating: pulse width limit ed by maximum junction temperature 2. l = 5.0mh, i as = 20a, v dd = 50v, r g = 25 , starting t j = 25 c 3. i sd 20a, di/dt 200a/ s, v dd bv dss , starting t j = 25 c 4. pulse test: pulse width 300 s, duty cycle 2% 5. essentially independent of operating temperature typical characteristics device marking device package reel size tape width quantity fdp20n50 fdp20n50 to-220 - - 50 FDPF20N50 FDPF20N50 to-220f - - 50 symbol parameter conditions min. typ. max units off characteristics bv dss drain-source breakdown voltage v gs = 0v, i d = 250 a 500 -- -- v bv dss / t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c -- 0.5 -- v/ c i dss zero gate voltage drain current v ds = 500v, v gs = 0v v ds = 400v, t c = 125 c -- -- -- -- 1 10 a a i gssf gate-body leakage current, forward v gs = 30v, v ds = 0v -- -- 100 na i gssr gate-body leakage current, reverse v gs = -30v, v ds = 0v -- -- -100 na on characteristics v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 3.0 -- 5.0 v r ds(on) static drain-source on-resistance v gs = 10v, i d = 10a -- 0.20 0.23 g fs forward transconductance v ds = 40v, i d = 10a (note 4) -- 24.6 -- s dynamic characteristics c iss input capacitance v ds = 25v, v gs = 0v, f = 1.0mhz -- 2400 3120 pf c oss output capacitance -- 355 465 pf c rss reverse transfer capacitance -- 27 -- pf switching characteristics t d(on) turn-on delay time v dd = 250v, i d = 20a r g = 25 (note 4, 5) -- 95 200 ns t r turn-on rise time -- 375 760 ns t d(off) turn-off delay time -- 100 210 ns t f turn-off fall time -- 105 220 ns q g total gate charge v ds = 400v, i d = 20a v gs = 10v (note 4, 5) -- 45.6 59.5 nc q gs gate-source charge -- 14.8 -- nc q gd gate-drain charge -- 21.6 -- nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -- -- 20 a i sm maximum pulsed drain-source diode forward current -- -- 80 a v sd drain-source diode forward voltage v gs = 0v, i s = 20a -- -- 1.4 v t rr reverse recovery time v gs = 0v, i s = 20a di f /dt =100a/ s (note 4) -- 507 -- ns q rr reverse recovery charge -- 7.20 -- c
3 www.fairchildsemi.com fdp20n50 / FDPF20N50 rev. c fdp20n50 / FDPF20N50 500v n-channel mosfet typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate voltage v ariation vs. s ource current and temperatue figure 5. capacitance characteristics figure 6. gate charge characteristics 24681012 10 0 10 1 10 2 150 o c 25 o c -55 o c * notes : 1. v ds = 40v 2. 250 s pulse test i d , drain current [a] v gs , gate-source voltage [v] 10 -1 10 0 10 1 10 0 10 1 v gs top : 15.0 v 10.0 v 8.0 v 7.0 v 6.5 v 6.0 v bottom : 5.5 v * notes : 1. 250 s pulse test 2. t c = 25 o c i d , drain current [a] v ds , drain-source voltage [v] 0.20.40.60.81.01.21.41.6 10 0 10 1 150 o c *notes : 1. v gs = 0v 2. 250 s pulse test 25 o c i dr , reverse drain current [a] v sd , source-drain voltage [v] 0 153045607590 0.0 0.2 0.4 0.6 0.8 v gs = 20v v gs = 10v * note : t j = 25 o c r ds(on) [ ], drain-source on-resistance i d , drain current [a] 0 1020304050 0 2 4 6 8 10 12 v ds = 250v v ds = 100v v ds = 400v * note : i d = 20a v gs , gate-source voltage [v] q g , total gate charge [nc] 10 -1 10 0 10 1 0 1000 2000 3000 4000 5000 6000 c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd * note : 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitances [pf] v ds , drain-source voltage [v]
4 www.fairchildsemi.com fdp20n50 / FDPF20N50 rev. c fdp20n50 / FDPF20N50 500v n-channel mosfet typical performance characteristics (continued) figure 7. breakdown voltage variatio n figure 8. on-resistance variation vs. temperature vs. temperature figure 9-1. maximum safe operating area figure 9-2. maximum safe operating area - fdp20n50 - FDPF20N50 figure 10. maximum drain currentvs. case temperature -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 * notes : 1. v gs = 0 v 2. i d = 250 a bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 * notes : 1. v gs = 10 v 2. i d = 10 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] 10 0 10 1 10 2 10 -2 10 -1 10 0 10 1 10 2 100 ms 1 ms 10 s dc 10 ms 100 s operation in this area is limited by r ds(on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] 10 0 10 1 10 2 10 -2 10 -1 10 0 10 1 10 2 100 ms 1 ms 10 s dc 10 ms 100 s operation in this area is limited by r ds(on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] 25 50 75 100 125 150 0 5 10 15 20 25 i d , drain current [a] t c , case temperature [ o c]
5 www.fairchildsemi.com fdp20n50 / FDPF20N50 rev. c fdp20n50 / FDPF20N50 500v n-channel mosfet typical performance characteristics (continued) figure 11-1 . transient thermal response curve - fdp20n50 figure 11-2. tran sient thermal response curve - FDPF20N50 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 * n otes : 1 . z jc (t) = 0.5 o c/w max. 2 . d u ty f a cto r, d = t 1 /t 2 3 . t jm - t c = p dm * z jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z jc (t), thermal response t 1 , square w ave pulse duration [sec] t 1 p dm t 2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 * n otes : 1 . z jc (t) = 3.3 o c/w max. 2 . d u ty f a cto r, d = t 1 /t 2 3 . t jm - t c = p dm * z jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z jc (t), thermal response t 1 , square w ave pulse duration [sec] t 1 p dm t 2
6 www.fairchildsemi.com fdp20n50 / FDPF20N50 rev. c fdp20n50 / FDPF20N50 500v n-channel mosfet gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms
7 www.fairchildsemi.com fdp20n50 / FDPF20N50 rev. c fdp20n50 / FDPF20N50 500v n-channel mosfet peak diode recovery dv/dt test circuit & waveforms
8 www.fairchildsemi.com fdp20n50 / FDPF20N50 rev. c fdp20n50 / FDPF20N50 500v n-channel mosfet mechanical dimensions dimensions in millimet ers to - 22 0
9 www.fairchildsemi.com fdp20n50 / FDPF20N50 rev. c fdp20n50 / FDPF20N50 500v n-channel mosfet mechanical dimensions (7.00) (0.70) max1.47 (30 ) #1 3.30 0.10 15.80 0.20 15.87 0.20 6.68 0.20 9.75 0.30 4.70 0.20 10.16 0.20 (1.00x45 ) 2.54 0.20 0.80 0.10 9.40 0.20 2.76 0.20 0.35 0.10 ?3.18 0.10 2.54typ [2.54 0.20 ] 2.54typ [2.54 0.20 ] 0.50 +0.10 ?0.05 to-220f
10 www.fairchildsemi.com fdp20n50 / FDPF20N50 rev. c fdp20n50 / FDPF20N50 500v n-channel mosfet fdp20n50 / FDPF20N50 500v n-channel mosfet trademarks the following are registered and unregistered trademarks fairchil d semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. hisec? disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising ou t of the application or use of any product or circuit described here in; neither does it convey any lice nse under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worl dwide terms and conditions, specifically the warranty ther ein, which cover s these products. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose fa ilure to perform when properly used in accordance with instruct ions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose fail ure to perform can be reasonably expected to cause the failure of t he life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms acex ? across the board. around the world.? activearray? bottomless? build it now? coolfet? crossvolt ? ctl? current transfer logic? dome? e 2 cmos? ecospark ? ensigna? fact quiet series? fact ? fast ? fastr? fps? frfet ? globaloptoisolator? i-lo ? implieddisconnect? intellimax? isoplanar? microcoupler? micropak? microwire? motion-spm? msx? msxpro? ocx? ocxpro? optologic ? optoplanar ? pacman? pdp-spm? pop? power220 ? power247 ? power-spm? programmable active droop? qfet ? qs? qt optoelectronics? quiet series? rapidconfigure? rapidconnect? scalarpump? smart start? spm ? stealth? superfet? supersot?-3 supersot?-6 supersot?-8 syncfet? tcm? the power franchise ? tinyboost? tinybuck? tinylogic ? tinyopto? tinypower? tinywire? trutranslation? serdes? uhc ? unifet? vcx? wire? datasheet identification product status definition advance information formative or in design this datas heet contains the design s pecifications for product development. specifications may c hange in any manner without notice. preliminary first production this datasheet contains preliminary data; supplementary data will be published at a later date. fairchild se miconductor reserves the right to make changes at any time without notice to improve design. no identification needed full production this datasheet cont ains final specifications . fairchild semiconductor reserves the right to make changes at any time without notice to improve design. obsolete not in production this datasheet contains specifications on a product that has been dis- continued by fairchild semiconductor. the datasheet is printed for refer- ence information only. rev. i26 tm gto? powersaver? powertrench ? tm poweredge? tm
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